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Timing Optimization Through Clock Skew Scheduling by Ivan S. Kourtev Paperback | Indigo Chapters
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2005, ISBN: 9781441943774

History of the Book The last three decades have witnessed an explosive development in - tegrated circuit fabrication technologies. The complexities of current CMOS circuits are reaching b… Plus…

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2005, ISBN: 9781441943774

History of the Book The last three decades have witnessed an explosive development in - tegrated circuit fabrication technologies. The complexities of current CMOS circuits are reaching b… Plus…

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Timing Optimization Through Clock Skew Scheduling - Kourtev, Ivan S.; Friedman, Eby G.; Taskin, Baris
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Kourtev, Ivan S.; Friedman, Eby G.; Taskin, Baris:
Timing Optimization Through Clock Skew Scheduling - Livres de poche

2010

ISBN: 1441943773

Edition reliée

Softcover reprint of hardcover 1st ed. 2009 Kartoniert / Broschiert Elektrotechnik, Elektronik, Computer-Aided Design (CAD), CircuitTiming; ClockSkewScheduling; ClockTiming; computer; E… Plus…

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Eby G. Friedman/ Ivan S. Kourtev/ Baris Taskin:
Timing Optimization Through Clock Skew Scheduling - Livres de poche

2009, ISBN: 1441943773

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Timing Optimization Through Clock Skew Scheduling ab 129.99 € als Taschenbuch: Softcover reprint of hardcover 1st ed. 2009. Aus dem Bereich: Bücher, Taschenbücher, Naturwissenschaft, Medi… Plus…

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Timing Optimization Through Clock Skew Scheduling - Eby G. Friedman/ Ivan S. Kourtev/ Baris Taskin
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Eby G. Friedman/ Ivan S. Kourtev/ Baris Taskin:
Timing Optimization Through Clock Skew Scheduling - Livres de poche

2009, ISBN: 1441943773

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Timing Optimization Through Clock Skew Scheduling ab 129.99 € als Taschenbuch: Softcover reprint of hardcover 1st ed. 2009. Aus dem Bereich: Bücher, Taschenbücher, Naturwissenschaft, Spri… Plus…

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Détails sur le livre
Timing Optimization Through Clock Skew Scheduling by Ivan S. Kourtev Paperback | Indigo Chapters

This book details timing analysis and optimization techniques for circuits with level-sensitive memory elements. It contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling. Coverage also provides a framework for and results from implementing timing optimization algorithms in a parallel computing environment.

Informations détaillées sur le livre - Timing Optimization Through Clock Skew Scheduling by Ivan S. Kourtev Paperback | Indigo Chapters


EAN (ISBN-13): 9781441943774
ISBN (ISBN-10): 1441943773
Version reliée
Livre de poche
Date de parution: 2010
Editeur: Ivan S. Kourtev
284 Pages
Poids: 0,433 kg
Langue: eng/Englisch

Livre dans la base de données depuis 2011-10-20T11:09:02+02:00 (Paris)
Page de détail modifiée en dernier sur 2022-10-24T05:35:38+02:00 (Paris)
ISBN/EAN: 9781441943774

ISBN - Autres types d'écriture:
1-4419-4377-3, 978-1-4419-4377-4
Autres types d'écriture et termes associés:
Auteur du livre: friedman, eby
Titre du livre: the clock, timing, scheduling


Données de l'éditeur

Auteur: Ivan S. Kourtev; Baris Taskin; Eby G. Friedman
Titre: Timing Optimization Through Clock Skew Scheduling
Editeur: Springer; Springer US
266 Pages
Date de parution: 2010-11-04
New York; NY; US
Imprimé / Fabriqué en
Langue: Anglais
106,99 € (DE)
109,99 € (AT)
118,00 CHF (CH)
POD
XVI, 266 p.

BC; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; Circuit Timing; Clock Skew Scheduling; Clock Timing; Computer; EDA; Optimization; Placement Methodologies; Signal; VLSI; VLSI CAD; algorithms; automation; integrated circuit; microprocessor; programming; Electronic Circuits and Systems; Electrical and Electronic Engineering; Computer-Aided Engineering (CAD, CAE) and Design; Electronics and Microelectronics, Instrumentation; Elektrotechnik; Computer-Aided Design (CAD); Elektronik; BB; EA

VLSI Systems.- Signal Delay in VLSI Systems.- Timing Properties of Synchronous Systems.- Clock Skew Scheduling and Clock Tree Synthesis.- Clock Skew Scheduling of Level-Sensitive Circuits.- Clock Skew Scheduling for Improved Reliability.- Delay Insertion and Clock Skew Scheduling.- Practical Considerations.- Clock Skew Scheduling in Rotary Clocking Technology.- Experimental Results.
Focuses on timing analysis and optimization techniques for circuits with level-sensitive memory elements Contains a linear programming formulation applicable to the timing analysis of large scale circuits Includes a delay insertion methodology that improves the efficiency of clock skew scheduling in level-sensitive circuits Provides an overview of circuit partitioning, placement, and synchronization methodologies that enables the implementation of high speed, low power circuits synchronized with ultra-modern resonant clocking technology Provides a framework for and results from implementing the described timing optimization algorithms in a parallel computing environment

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