2010, ISBN: 144191935X
[EAN: 9781441919359], Nouveau livre, [SC: 15.0], [PU: Springer New York], COMPUTERS - GENERAL INFORMATION SYSTEMS ARCHITECTURE NETWORKING SOFTWARE DEVELOPMENT & ENGINEERING ASSEMBLY LANGU… Plus…
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2010, ISBN: 144191935X
[EAN: 9781441919359], Neubuch, [PU: Springer New York], COMPUTERS - GENERAL INFORMATION SYSTEMS ARCHITECTURE NETWORKING SOFTWARE DEVELOPMENT & ENGINEERING ASSEMBLY LANGUAGE CISC MIPS PROC… Plus…
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2010, ISBN: 9781441919359
Springer, Taschenbuch, Auflage: Softcover reprint of hardcover 1st ed. 2005, 404 Seiten, Publiziert: 2010-09-30T00:00:01Z, Produktgruppe: Buch, 1.69 kg, Hardware & Technik, Computer & Int… Plus…
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ISBN: 9781441919359
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*Guide to RISC Processors: For Programmers and Engineers* - for Programmers and Engineers. Softcover of Or / Taschenbuch für 65.99 € / Aus dem Bereich: Bücher, Ratgeber, Computer & Intern… Plus…
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2010, ISBN: 9781441919359
Paperback, New., 388 p. 5 Tables, black and white; 80 Illustrations, black and white; XVI, 388 p. 80 illus. Intended for professional and scholarly audience., New York, NY, [PU: Springer-… Plus…
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2010, ISBN: 144191935X
[EAN: 9781441919359], Nouveau livre, [SC: 15.0], [PU: Springer New York], COMPUTERS - GENERAL INFORMATION SYSTEMS ARCHITECTURE NETWORKING SOFTWARE DEVELOPMENT & ENGINEERING ASSEMBLY LANGU… Plus…
2010, ISBN: 144191935X
[EAN: 9781441919359], Neubuch, [PU: Springer New York], COMPUTERS - GENERAL INFORMATION SYSTEMS ARCHITECTURE NETWORKING SOFTWARE DEVELOPMENT & ENGINEERING ASSEMBLY LANGUAGE CISC MIPS PROC… Plus…
2010
ISBN: 9781441919359
Springer, Taschenbuch, Auflage: Softcover reprint of hardcover 1st ed. 2005, 404 Seiten, Publiziert: 2010-09-30T00:00:01Z, Produktgruppe: Buch, 1.69 kg, Hardware & Technik, Computer & Int… Plus…
ISBN: 9781441919359
Edition reliée
*Guide to RISC Processors: For Programmers and Engineers* - for Programmers and Engineers. Softcover of Or / Taschenbuch für 65.99 € / Aus dem Bereich: Bücher, Ratgeber, Computer & Intern… Plus…
2010, ISBN: 9781441919359
Paperback, New., 388 p. 5 Tables, black and white; 80 Illustrations, black and white; XVI, 388 p. 80 illus. Intended for professional and scholarly audience., New York, NY, [PU: Springer-… Plus…
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Informations détaillées sur le livre - Guide to RISC Processors: For Programmers and Engineers
EAN (ISBN-13): 9781441919359
ISBN (ISBN-10): 144191935X
Version reliée
Livre de poche
Date de parution: 2010
Editeur: SPRINGER NATURE
402 Pages
Poids: 0,717 kg
Langue: eng/Englisch
Livre dans la base de données depuis 2011-06-01T07:46:46+02:00 (Paris)
Page de détail modifiée en dernier sur 2023-11-27T07:18:55+01:00 (Paris)
ISBN/EAN: 144191935X
ISBN - Autres types d'écriture:
1-4419-1935-X, 978-1-4419-1935-9
Autres types d'écriture et termes associés:
Auteur du livre: modern media verlag
Titre du livre: processo, risc
Données de l'éditeur
Auteur: Sivarama P. Dandamudi
Titre: Guide to RISC Processors - for Programmers and Engineers
Editeur: Springer; Springer US
388 Pages
Date de parution: 2010-09-30
New York; NY; US
Imprimé / Fabriqué en
Poids: 0,765 kg
Langue: Anglais
53,49 € (DE)
54,99 € (AT)
59,00 CHF (CH)
POD
XVI, 388 p. 80 illus.
BC; Processor Architectures; Hardcover, Softcover / Informatik, EDV/Informatik; Rechnerarchitektur und Logik-Entwurf; Verstehen; Assembly language; CISC; MIPS; Processor architecture; Reduced Instruction Set Computer; architecture; computer; computer architecture; design; download; language; processor; programming; Control Structures and Microprogramming; Software Engineering/Programming and Operating Systems; Computer Systems Organization and Communication Networks; Programming Techniques; Processor Architectures; Control Structures and Microprogramming; Software Engineering; Computer Engineering and Networks; Programming Techniques; Computerhardware; Software Engineering; Computerprogrammierung und Softwareentwicklung; BB
Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium. This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here. Features: *Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience *Presents material in a manner suitable for flexible self-study • Assembly language programs permit reader executables using the SPIM simulator • Integrates core concepts to processor designs and their implementations • Supplies extensive and complete programming examples and figures • Contains chapter-by-chapter overviews and summaries * Provides source code for the MIPS language at the book’s website Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource. Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization. Key Topics * Processor design issues * Evolution of CISC and RISC processors * MIPS, SPARC, PowerPC, Itanium, and ARM architectures * MIPS assembly language * SPIM simulator and debugger * Conditional execution * Floating-point and logical and shift operations * Number systems Computer Architecture/Programming Beginning/Intermediate LevelAutres livres qui pourraient ressembler au livre recherché:
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