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Low Power Digital CMOS Design - Chandrakasan, Anantha P. / Chandrakasan, A. P. / Brodersen, R. W.
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Chandrakasan, Anantha P. / Chandrakasan, A. P. / Brodersen, R. W.:

Low Power Digital CMOS Design - livre d'occasion

ISBN: 9780792395768

ID: 3174082

Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications. Low Power Digital CMOS Design Chandrakasan, Anantha P. / Chandrakasan, A. P. / Brodersen, R. W., Springer

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Low Power Digital CMOS Design - Anantha P. Chandrakasan; Robert W. Brodersen
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Anantha P. Chandrakasan; Robert W. Brodersen:

Low Power Digital CMOS Design - livre d'occasion

ISBN: 079239576X

ID: 6959976

Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, descr computer science,computers and technology,electrical and electronics,engineering,logic,programming,software design testing and engineering,textbooks Computer Science, Kluwer Academic Publishers

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Low Power Digital CMOS Design - Chandrakasan, Anantha P.; Brodersen, Robert W.
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Chandrakasan, Anantha P.; Brodersen, Robert W.:
Low Power Digital CMOS Design - edition reliée, livre de poche

1995

ISBN: 079239576X

ID: 17243548356

[EAN: 9780792395768], Neubuch, [PU: Kluwer Academic Publishers], Technology|Electricity, Technology|Electronics|Circuits|General, Technology|Electronics|Semiconductors, Technology|Engineering|Electrical

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Low Power Digital Cmos Design - Anantha P. Chandrakasan
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Anantha P. Chandrakasan:
Low Power Digital Cmos Design - Livres de poche

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ID: 13479891593

Softcover, PLEASE NOTE, WE DO NOT SHIP TO DENMARK. New Book. Shipped from US in 4 to 14 days (standard) 3 to 8 days (expedited). Established seller since 2000., [PU: Kluwer Academic Publishers]

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Low Power Digital Cmos Design - Anantha P. Chandrakasan
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Low Power Digital Cmos Design - edition reliée, livre de poche

1995, ISBN: 9780792395768

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Détails sur le livre
Low Power Digital CMOS Design
Auteur:

Chandrakasan, Anantha P.; Brodersen, R. W.

Titre:

Low Power Digital CMOS Design

ISBN:

079239576X

Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications.

Informations détaillées sur le livre - Low Power Digital CMOS Design


EAN (ISBN-13): 9780792395768
ISBN (ISBN-10): 079239576X
Version reliée
Livre de poche
Date de parution: 2007
Editeur: Springer-Verlag GmbH
424 Pages
Poids: 0,798 kg
Langue: eng/Englisch

Livre dans la base de données depuis 25.05.2007 02:24:32
Livre trouvé récemment le 08.11.2016 23:57:14
ISBN/EAN: 079239576X

ISBN - Autres types d'écriture:
0-7923-9576-X, 978-0-7923-9576-8

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